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Design and Implementation of Low Power and Area Efficient 4 Bit ALU Using MGDI Technique

Nitin Singh1

Section:Research Paper, Product Type: Journal Paper
Volume-07 , Issue-10 , Page no. 87-90, May-2019

CrossRef-DOI:   https://doi.org/10.26438/ijcse/v7si10.8790

Online published on May 05, 2019

Copyright © Nitin Singh . This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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IEEE Style Citation: Nitin Singh , “Design and Implementation of Low Power and Area Efficient 4 Bit ALU Using MGDI Technique,” International Journal of Computer Sciences and Engineering, Vol.07, Issue.10, pp.87-90, 2019.

MLA Style Citation: Nitin Singh "Design and Implementation of Low Power and Area Efficient 4 Bit ALU Using MGDI Technique." International Journal of Computer Sciences and Engineering 07.10 (2019): 87-90.

APA Style Citation: Nitin Singh , (2019). Design and Implementation of Low Power and Area Efficient 4 Bit ALU Using MGDI Technique. International Journal of Computer Sciences and Engineering, 07(10), 87-90.

BibTex Style Citation:
@article{Singh_2019,
author = {Nitin Singh },
title = {Design and Implementation of Low Power and Area Efficient 4 Bit ALU Using MGDI Technique},
journal = {International Journal of Computer Sciences and Engineering},
issue_date = {5 2019},
volume = {07},
Issue = {10},
month = {5},
year = {2019},
issn = {2347-2693},
pages = {87-90},
url = {https://www.ijcseonline.org/full_spl_paper_view.php?paper_id=980},
doi = {https://doi.org/10.26438/ijcse/v7i10.8790}
publisher = {IJCSE, Indore, INDIA},
}

RIS Style Citation:
TY - JOUR
DO = {https://doi.org/10.26438/ijcse/v7i10.8790}
UR - https://www.ijcseonline.org/full_spl_paper_view.php?paper_id=980
TI - Design and Implementation of Low Power and Area Efficient 4 Bit ALU Using MGDI Technique
T2 - International Journal of Computer Sciences and Engineering
AU - Nitin Singh
PY - 2019
DA - 2019/05/05
PB - IJCSE, Indore, INDIA
SP - 87-90
IS - 10
VL - 07
SN - 2347-2693
ER -

           

Abstract

In this paper, the design of a 4-Bit Arithmetic Logic Unit (ALU) using Modified Gate Diffusion Input technique is being done which is implemented using minimum transistor full adder and also adapts hardware reuse method which has advantages of minimum transistors requirement, more switching speed and low power consumption with respect to the conventional CMOS techniques. 4-Bit Arithmetic Logic Unit (ALU) is being implemented with MGDI technique in DSCH 3.5 and layout generated in Microwind tool. The Simulation is done using 65 nm technology at 1.2 v supply voltage The results show that the proposed design consume less power uses less number of transistors, while achieving full swing operation compared to previous work

Key-Words / Index Term

MGDI, PTL, CMOS, Switching Delay, Power dissipation

References

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