Open Access   Article Go Back

Hardware Implementation of .....................................m

Pulak Mazumder1 , Rajarshi Middya2 , Mrinal Kanti Naskar3

Section:Research Paper, Product Type: Journal Paper
Volume-07 , Issue-01 , Page no. 28-32, Jan-2019

Online published on Jan 20, 2019

Copyright © Pulak Mazumder, Rajarshi Middya, Mrinal Kanti Naskar . This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

View this paper at   Google Scholar | DPI Digital Library

XML View
PDF Download

How to Cite this Paper

  • IEEE Citation
  • MLA Citation
  • APA Citation
  • BibTex Citation
  • RIS Citation

IEEE Style Citation: Pulak Mazumder, Rajarshi Middya, Mrinal Kanti Naskar, “Hardware Implementation of .....................................m,” International Journal of Computer Sciences and Engineering, Vol.07, Issue.01, pp.28-32, 2019.

MLA Style Citation: Pulak Mazumder, Rajarshi Middya, Mrinal Kanti Naskar "Hardware Implementation of .....................................m." International Journal of Computer Sciences and Engineering 07.01 (2019): 28-32.

APA Style Citation: Pulak Mazumder, Rajarshi Middya, Mrinal Kanti Naskar, (2019). Hardware Implementation of .....................................m. International Journal of Computer Sciences and Engineering, 07(01), 28-32.

BibTex Style Citation:
@article{Mazumder_2019,
author = {Pulak Mazumder, Rajarshi Middya, Mrinal Kanti Naskar},
title = {Hardware Implementation of .....................................m},
journal = {International Journal of Computer Sciences and Engineering},
issue_date = {1 2019},
volume = {07},
Issue = {01},
month = {1},
year = {2019},
issn = {2347-2693},
pages = {28-32},
url = {https://www.ijcseonline.org/full_spl_paper_view.php?paper_id=587},
publisher = {IJCSE, Indore, INDIA},
}

RIS Style Citation:
TY - JOUR
UR - https://www.ijcseonline.org/full_spl_paper_view.php?paper_id=587
TI - Hardware Implementation of .....................................m
T2 - International Journal of Computer Sciences and Engineering
AU - Pulak Mazumder, Rajarshi Middya, Mrinal Kanti Naskar
PY - 2019
DA - 2019/01/20
PB - IJCSE, Indore, INDIA
SP - 28-32
IS - 01
VL - 07
SN - 2347-2693
ER -

           

Abstract

Error

Key-Words / Index Term

Signal processing, VLSI, FFT, Transforms

References

[1] J. Granata, M. Conner, and R. Tolimieri, “Recursive fast algorithm and the role of the tensor product,” IEEE Transactions on Signal Processing, vol. 40, no. 12, pp. 2921–2930, Dec 1992.
[2] J. R. Johnson, R. W. Johnson, D. Rodriguez, and R. Tolimieri, “A methodology for designing, modifying, and implementing fourier transform algorithms on various architectures,” Circuits, Systems and Signal Processing, vol. 9, no. 4, pp. 449–500, Dec 1990.
[3] D. F. Chiper, “Radix-2 fast algorithm for computing discrete hartley trans- form of type iii,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 59, no. 5, pp. 297–301, May 2012.
[4] D. F. Chiper, “A novel vlsi dht algorithm for a highly modular and parallel archi- tecture,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 60, no. 5, pp. 282–286, May 2013.
[5] M. T. Hamood and S. Boussakta, “Fast walsh-hadamard-fourier transform algorithm,” IEEE Transactions on Signal Processing, vol. 59, no. 11, pp. 5627–5631, Nov 2011.
[6] J. R. Johnson and A. F. Breitzman, “Automatic derivation and implemen- tation of fast convolution algorithms,” Journal of Symbolic Computation, vol. 37, no. 2, pp. 261 – 293, 2004.
[7] M. A. Richard Tolimieri and C. Lu, Algorithms for Discrete Fourier Transform and Convolution. Springer-Verlag New York, 1997.